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SA2532
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FEATURES n Speech circuit, LD/MF Dialler and Tone Ringer on one 28 pin CMOS chip n Soft clip to avoid harsh distortion n Line Loss Compensation selectable by pin option n Power down mode n Versatile applications for different PTT demands n 31 digit last number redial n Sliding Cursor protocol with comparison n 2 Flash keys, 100 ms and 280 ms (option 600 ms) n Pause key for 3 sec Auto Pause or Wait Function GENERAL DESCRIPTION The SA2532 is a CMOS integrated circuit that contains all the functions needed to form a high performance electronic telephone. The device incorporates LD/MF dialling, melody generation, ring frequency discrimination and a high quality speech circuit. A RAM is on chip for a 31 digit last number redial. The sliding cursor procedure makes Last Number Redial easy behind a PABX. The versatility of the circuit is provided by on chip programmability and a few external components. This allows easy adaption to different PTT requirements without changing the PCB of the telephone.
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SA2532 A/C/U
VERSATILE SINGLE CHIP TELEPHONE
Ring frequency discrimination Operating range from 13 to 100 mA (down to 5 mA with reduced performance) Low noise (max. -72dBmp) Real or Complex impedance on chip programmable LD/MF switchable dialling On chip MF filter (CEPT CS 203 compatible) 3-tone melody generator with selectable repetition rates
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PACKAGE Available in 28 pin DIP and SOIC
LS RO2 RO1 V DD A GND STB CI MO LLC HS DP OSC RR C4 C3
1
28
RI LI V SS CS M2 M1
SA2532
MODE FCI R1 R2 R3 R4
14
DR-00975
15
C1 C2
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4153 PDS039-SA2532-001 Rev. C
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SA2532 PIN DESCRIPTION
Pin# 23 24 3 2 5 28 6 1 27 25 Symbol M1 M2 RO1 RO2 AGND RI STB LS LI CS Function Microphone Inputs Differential inputs for the microphone (electret). Receiver Outputs These are the outputs for driving a dynamic earpiece with an impedance of 100 to 300 Analog Ground This is the analog ground for the amplifiers. Receive Input This is the input for the receive signal. Side Tone Balance Input This is the input for side tone cancellation. Line Current Sense Input This is the input for sensing the line current. Line Input This input is used for power extraction and line current sensing. Current Shunt Control Output This N-channel open drain output controls the external high power shunt transistor for the modulation of the line voltage and for shorting the line during make period of pulse dialling. Positive Voltage Supply This is the supply pin for the circuit. Negative Power Supply Melody Output Pulse Density Modulated output of the melody generator for tone ringer. At high impedance when not active. Frequency Comparator Input This is a Schmitt trigger input for ring frequency discrimination. Disabled during off-hook. Hook Switch Input and Dial Pulse Output This is an I/O that is pulled high by the hook switch when off- hook. An open drain pulls it low during break periods of pulse dialling and flash. Oscillator Input Oscillator pin for Xtal or ceramic resonator (3.58 MHz). Line Loss Compensation Select pin for line loss compensation. Repetition Rate Select pin for repetition rate of melody. Signalling Mode Select Input Mode pin Function High LD default mode, make/break = 33/66 ms Open MF only Low LD default mode, make/break = 40/60 ms Keyboard Rows
4 26 8
VDD VSS MO
21
FCI
10
HS/DP
11 9 12 22
OSC LLC RR MODE
20 19 18 17 16 15 14 13 7
R1 R2 R3 R4 C1 C2 C3 C4 CI
Keyboard Columns
Complex Impedance Input Input pin for the capacitor in the complex impedance
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SA2532 FUNCTIONAL DESCRIPTION Power On Reset The on chip power on reset circuit monitors the supply voltage (V DD). When VDD rises above approx. 1.2V, a power on reset occurs to assure correct start-up and the RAM is cleared. DC Conditions The normal operating range is from 13mA to 100 mA. Operating range with reduced performance is from 5mA to 13mA. In the operating range all functions are operational. In the line hold range from 0 to 5 mA the device is in a power down mode and the voltage at LI is reduced to maximum 3.5V. The dc characteristic (excluding diode bridge and Pulsing transistors) is determined by the voltage at LI and the resistor R1 as follows: VLS = VLI + ILine.R1 The voltage at LI is 4.5V. During pulse dialling the speech circuit and other parts of the device not required are in a power down mode to save current. The CS pin is pulled to VSS in order to turn the external shunt transistor on to keep a low voltage drop at the LS pin during make periods. AC Impedance The Characteristic or Output impedance of the SA2532 is set within the IC and adjusted by Mask Options. Available options are for 600 and 1000. When the 1000 option is selected then a capacitor may be added to the circuit at pin CI to add a reactive element and make the output impedance complex. Oscillator All the Timing Functions of the SA2532 are based on a Clock Frequency of 3.58MHz. A crystal or ceramic resonator of this frequency should be connected to the OSC pin. In practise minor deviations from the nominal frequency may occur due to the characteristics of the frequency reference device used and so it is recommended that care is taken in the selection of components. In some cases a small value capacitor ( 47pF) may have to be connected in parallel with the Frequency Reference to ensure start-up and/or operation at the nominal frequency. Speech Circuit The speech circuit consists of a transmit and a receive path with soft clip, mute, line loss compensation and side tone cancellation. Transmit The gain of the transmit path is 35 dB for M1/M2 to LS (see test circuit figure 5). The microphone input is differential with an input impedance of 25 k. The soft clip circuit limits the output voltage at LI to 2.0VPEAK. The attack time is 30s/6dB and the decay time is 20 ms/6 dB. When mute is active, during dialling or after pressing the MUTE key, the gain is reduced by > 60 dB.
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SA2532
Receive The receive input is the differential signal of RI and STB. The gain of the receive path is 2 dB (test circuit figure 5) with differential outputs, RO1/RO2 (0dB on SA2532C/U). When mute is active during dialling the gain is reduced by > 60dB. During DTMF dialling a MF comfort tone is applied to the receiver. The comfort tone is the DTMF signal with a level that is -30dB relative to the line signal. Side Tone Side Tone is controlled along with Return Loss by a Double Balance Bridge as shown in
RETURN LOSS
SIDE TONE
LINE
RI
R1
LI
SYN
R2
R5 STB
L
VS S
ONE COMMON GROUND
DR-00708
Fig. 1. Figure 1 Double balance bridge (return loss and side tone) with one common ground A good side tone cancellation is achieved by using the following equation: ZBAL ZLINE = R5 R1
The side tone cancellation signal is applied to the STB input. Line Loss Compensation When Line Loss Compensation is active the gain of the Transmit and Receive amplifiers are changed by 6dB in accord with the DC conditions as measured at Pins LI and LS. When the LLC Pin is Low this adjustment in gain occurs over the range I LINE = 20 to 50 mA. When LLC is High the range is 45 to 75mA. Note that these figures apply for R1 = R30. When the LLC Pin is open the amplifier gains remain fixed regardless of the Line Current.
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ZB
ZR
E F
A
SA2532 Dialling Functions Valid Keys The keypad of the SA2532 comprises a maximum of 20 keys (of which 3 have no function). A Bi-polar scan technique is used so that the 20 keys are scanned in a 4 x 5 matrix using only 8 pins. A valid key is detected when one and only one contact closure is detected between a Row and Column Pin. Key contacts are debounced to avoid incorrect detection. Dial Mode Selection The default mode (LD or MF) can be selected by the Mode pin. When default LD mode is selected, a temporary change to MF can be invoked by pressing the * key. The circuit will revert to LD by pressing the R (or R2) key or by next on-hook. When MF mode is selected by the mode pin, the circuit can not be changed temporarily to LD but will remain in MF. Last Number Redial LNR is a facility that allows resignalling of the last manually dialled number without keying in all the digits again. The LNR is repeatable. The current contents of the RAM are overwritten by new entries. A manually entered number is automatically stored in the LNR RAM. The capacity of the RAM is 31 digits. If a number greater than 31 digits is entered, the LNR facility will be inhibited (Until new entries < 32 digits) and further entries will be buffered in a First In First Out Memory (FIFO). Post dialled digits, i.e. digits manually entered after LNR has been invoked, are not stored in RAM but buffered in FIFO. During dialling, one or more pauses can be inserted by pressing the PAUSE KEY. Each pause is 3 secs (optionally 6 secs) when inserted within the first 5 digits. Otherwise a Wait Function will halt dialling until the LNR Key is pressed. Recall Function A Recall (R key or R2 key) activation will invoke a Flash (Timed Loop Break). If Recall is the first entry in a digit string, it will be stored in LNR RAM when digit(s) are entered after the Recall. If the recall key is depressed after a digit string has been entered or dialled out, the recall will not be stored but buffered in the FIFO together with subsequently entered digits. If pressing the recall key is not followed by digit entries, the LNR RAM remains intact. After a recall, a 3 second pause will automatically be executed. Mute Function The MUTE key is enabled in speech mode only. Depressing the MUTE key mutes the microphone amplifier. Repressing the MUTE key deactivates the mute (toggle function). Any key entry overwrites a mute activated by the MUTE key and mute will be deactivated. When privacy mute is activated a reminder tone is applied to the earpiece every 3 seconds. sames
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SA2532
Sliding Cursor Procedure To accommodate easy and uncomplicated redialling (LNR) behind a PABX, a sliding cursor protocol is implemented. If new entries match the previous RAM contents, pressing the LNR key will dial out the remaining digits. If there is an error in matching, the LNR will be inhibited until next on-hook, and the RAM will contain the new number. Tone Generator The tone generator incorporates the DTMF tones and 3 basic frequencies for the tone ringer. DTMF Tones The DTMF Tone Generator creates 12 Tones in compliance with CCITT Recommendation Q23. Signal levels are altered by Mask Option. High group frequencies have a level 2.6dB higher than those of the Low Group. Details of the DTMF Tones are: Low group Digit 1-2-3 Digit 4-5-6 Digit 7-8-9 Digit *-0-# High group Digit 1-4-7-* Digit 2-5-8-0 Digit 3-6-9-# 1209Hz 1336 Hz 1477Hz (Error = +.533%) (Error = +.176%) (Error = -.141%) 697Hz 770Hz 852Hz 941Hz (Error = -.074%) (Error = -.679% (Error = -.621%) (Error = +.139%)
Errors are calculated with reference to a base clock of 3.58MHz and at ambient temperature of 24C. They exclude tolerance errors in the base frequency. KEYBOARD ARRANGEMENT
C1 C2 C3 C4
R1
MUTE 4 8 # LNR/CONT.
1 5 9 PAUSE
2 6 0 R
3 7 * R2
R2
R3
R4
DR-00709
Figure 2
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SA2532 Microcontroller Interface The keypad Row and Column Pins can readily be driven by a Microcontroller Interface. When configured in this way the SA2532 inputs and dials the corresponding digits in either LD or DTMF. The LNR store can be used to buffer digits to allow high speed data entry. See Application Note AN3002A for details. Tone Ringer The Tone Ringer of the SA2532 incorporates a Discriminator Circuit and adjustable Melody Generator Ring Frequency Discrimination The Ring Frequency Discriminator assures that only signals with a frequency between 20Hz and 60Hz (option 13 Hz to 60 Hz) are regarded as valid ring signals. When a valid ring signal is present for 73ms continuously, the melody generator is activated and remains active as long as the ring signal is present. Once the melody generator has been started, the ring signal is continuously monitored and the melody generator is instantly turned on or off according to the momentary presence of a valid or unvalid ring signal respectively (until next POR or off-hook). Melody Generator When a Valid Ring Signal is detected the Melody generator is activated and creates a ringing Signal comprising 3 frequencies F1 (1065Hz), F2 (1420Hz) and F3 (1734Hz). These frequencies are repeated in a sequence of 6 time slots constructed by the frequencies F1 F2 F3 F1 F2 F3 This sequence is repeated 1, 4, 7 or 10 times per second as indicated by the connection of the RR Pin to one of the four rows of the keyboard.
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SA2532
TYPICAL APPLICATION Only the components necessary for presenting the complete functions of the SA2532 are included. FIGURE 3
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SA2532
FEATURE PHONE APPLICATION Only the components necessary for presenting the complete functions of the SA2532 are included. FIGURE 4
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SA2532 OPERATING PROCEDURES Procedure Principles The procedures for utilizing the features of the SA2532 are optimized out of consideration for the human factor in order to: - meet the user's expectations - be easy to learn and relearn - not invoke any automatic functions which the user doesn't expect - protect the user from committing critical errors, e.g. dialling wrong numbers, deleting stored numbers, etc. - be consistent, simple and usable
SYMBOLS
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SA2532 Privacy Mute
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SA2532 Temporary MF
FIFO
Pressing any other key does not change the state.
EXIT FIFO
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SA2532 TIMING DIAGRAMS LD Dialling
LD Dialling with Access Pause
MF Dialling
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SA2532 Flash
ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Positive Supply Voltage ....................................................................................... -0.3VVDD7V Input current .................................................................................................................. 25mA Input Voltage (LS) .............................................................................................. -0.3VVIN10V Input Voltage (LI, CS) ........................................................................................... -0.3VVIN8V Input Voltage (STB, RI) .............................................................................. -2VVVINVDD+0.3V Input Voltage (MO) ............................................................................................. -0.3VVIN35V Digital Input Voltage ................................................................................... -0.3VVINVDD+0.3V Electrostatic Discharge ................................................................................................... 800V Storage Temperature ...................................................................................... -65C to +125C Recommended Operating Conditions Supply Voltage * (Speech Mode).......................................................................... 4VVDD5V Oscillator Frequency (Resonator: Murata CSA 3.58M G312AM).......................... 3.58 MHz Operating Temperature ................................................................................... -25C to +70C * This voltage is generated internally DC Characteristics (ILINE = 15 mA unless otherwise specified) Symbol IDD Parameter Operating Current Conditions Speech mode MF dialling LD dialling VDD = 2.5V Ring mode V DD = 2.5V Idle mode V DD = 2V, TAMB = 25C 13mAILINE 100mA VOL = 0.4V Min Typ 3 4 200 300 0.05 4.5 1.5 Max 5 Units mA mA A A A V mA
IDDO VLI IOL
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Retention Current Line Voltage (default) Output Current, Sink CS,HS/DP,MO sames
SA2532 AC Characteristics (ILINE=15mA;f=800Hz unless otherwise specified) Symbol Parameter TX Transmit ATX ATX/F THD VAGC ASCO tATTACK tDECAY ZIN AMUTE VNO VFC Gain (M1/M2) Variation with Frequency Distortion Soft Clip Level Soft Clip Overdrive Attack Time Decay Time Input Impedance (M1/M2) Mute Attenuation Noise Output Voltage Unwanted Frequency Components VIN MAX BJT VIN MAX VTX RL Input Voltage Range (M1/M2) Output Driver Input Voltage Range (LI) Dynamic Range Return Loss ZRL = 600 SA2532A ZRL = 1000 SA2532C/U Note 1: -37 dBm at 4.3 kHz and decreasing 12 dB/octave till 28 kHz. 18 2 2 VPEAK VPEAK dB 50...300 Hz 4.3...28 kHz above 28 kHZ Differential Single Ended 1 0.5 Mute activated 60 -72 -43 note 1 -70 dBm VPEAK VPEAK Conditions Test Circuit Fig.5 ZRL=600 ZRL = 1000 f=500Hz to 3.4kHz VLI0.5VRMS VLI = 2 20 30 20 20 Min 34 Typ 35 36.5 0.8 2 dB % VPEAK dB s/6dB ms/6dB k dB dBmp dBm Max 36 Units dB
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SA2532 AC Characteristics (cont'd) (ILINE = 15 mA;f=800Hz unless otherwise specified) Symbol Parameter RX ARX ARX/F THD VAGC ASCO tATTACT tDECAY VNO VFC ZIN VIN RI ST AST VIN ST ZIN tD tHS-L tHS-H F VMF VL-H THD tTD tITP Conditions Min 1 Typ 2 -0.2 0.8 2 1 10 VRI>0.8V 30 20 -72 50 Hz...20 kHz 8 2 Test Circuit Fig.5 VRI0.5VRMS 26 2 80 15 Going off-hook Line breaks/on-hook -.679 -12.5 -9.5 2.0 80 80 15 240 +.533 -9.5 -6.5 3.0 -30 82.3 82.3 85 85 -60 dB % VPEAK dB s/6dB ms/6dB dBmp dBm k VPEAK dB VPEAK k ms ms ms % dB dB dB dBr ms ms Max Units 3 dB Receive Test Circuit Fig.5 Receive Gain (RO1/RO2) ZRL=600 ZRL=1000 Variation with Frequency Distortion Soft Clip Level Soft Clip Overdrive Attact Time Decay Time Noise Output Voltage Unwanted Frequency Components Input Impedance (RI) Input Voltage Range(RI) Sidetone Sidetone Cancellation Input Voltage Range (STB) Input Impedance (STB) Keyboard Key Debounce Time HS Input Low to High Debounce High to Low Debounce f=500 Hz to 3.4 kHz VRI0.5VRMS VRI=
DTMF Frequency deviation Note 5 MF Tone Level(Low group) Optionally Preemphasis Low to High Distortion Tone Duration Inter Tone Pause Note 3 Note 1
-11 -8 2.6
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SA2532 AC Characteristics Cont'd Symbol Parameter tTR tTF tDR tM/B tPDP tIDP tMO tFD Tone Rise Time Tone Fall Time LD Dial Rate Make/Break Period Pre-Digit Pause Inter Digit Pause Mute Overhang Flash Duration 1 Flash Duration 2 Flash Duration 2 Post Flash Pause Access Pause Period Tone Ringer Melody Output Level Melody Delay Frequency 1 Frequency 2 Frequency 3 Detection Time Detection Time-out Min. Detection Frequency Min. Detection Frequency Max. Detection Frequency Reminder Tone Level (RO1/RO2) Duration Interval Comfort Tone (DTMF) Level (RO1/RO2) SA2532A/U SA2532C VMO tMD F1 F2 F3 tDT tTO fMIN fMIN fMAX VRT tRTD tRTI VCT SA2532A/C SA2532U 100 270 600 2.9 2.9 5.8 3.0 3.0 6.0 PDM 1020 1363 1665 70 19 12 58 1064 1420 1734 note 4 20 13 59 -30 82.3 3 -30 10 1107 1477 1803 80 21 14 60 ms Hz Hz Hz ms ms Hz Hz Hz dBr ms sec dBr 800 5% 5%, MODE=low 5%, MODE=high 10 40.8/61.2 33/66 35 840 tM 102 300 650 3.1 3.1 6.2 ms ms ms sec. sec sec 880 pps ms ms ms ms Conditions Note 2 Note 2 Min Typ Max 5 5 Units ms ms
tPFP tAP
Initial
Optionally
Relative to LS
Relative to LS
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SA2532 Note 1: Note 2: Note 3: Note 4: The values are valid during automatic dialling and are minimum values during manual dialling, i.e. the tones will continue as long as the key is depressed. The rise time is the time from 10% of final value until the tone amplitude has reached 90% of its final value. Relative to high group. The FCI circuit is reset by POR and HS/DP pulled high (off-hook). After a reset the FCI circuit is in a standby state. A positive edge on FCI will start a 73ms timer and the frequency discrimination is initiated. Whenever a period of the ring signal is missing, the timer is reset. When a valid ring signal is present for 73ms, the melody generator is started and is directly controlled by the ring signal. This condition will remain until a new reset. This does not include the frequency deviation of the ceramic resonator.
Note 5:
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SA2532 Test Circuit
Figure 5
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SA2532 Ordering Information: Versions SA2532A P SA2532A S SA2532C P SA2532C S SA2532U P SA2532U S ZRL (ohm) 600 600 1000 1000 1000 1000 DTMF Level -6/-8dBm -6/-8dBm -6/-8dBm -6/-8dBm -9/-11dBm -9/-11dBm R2 Period 280ms 280ms 280ms 280ms 600ms 600ms Access Pause 3s 3s 6s 6s 3s 3s Package 28 pin DIP 28 pin SOIC 28 pin DIP 28 pin SOIC 28 pin DIP 28 pin SOIC
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SA2532
NOTES:
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SA2532
Disclaimer: The information contained in this document is confidential and proprietary to South African MicroElectronic Systems (Pty) Ltd ("SAMES) and may not be copied or disclosed to a third party, in whole or in part, without the express written consent of SAMES. The information contained herein is current as of the date of publication; however, delivery of this document shall not under any circumstances create any implication that the information contained herein is correct as of any time subsequent to such date. SAMES does not undertake to inform any recipient of this document of any changes in the information contained herein, and SAMES expressly reserves the right to make changes in such information, without notification,even if such changes would render information contained herein inaccurate or incomplete. SAMES makes no representation or warranty that any circuit designed by reference to the information contained herein, will function without errors and as intended by the designer.
South African Micro-Electronic Systems (Pty) Ltd P O Box 15888, 33 Eland Street, Lynn East, Koedoespoort Industrial Area, 0039 Pretoria, Republic of South Africa, Republic of South Africa
Tel: Fax:
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012 333-6021 012 333-8071 sames
Tel: Fax:
Int +27 12 333-6021 Int +27 12 333-8071

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